Appendix A
The 6502 Instruction Set


The following is a complete listing of the 6502 microprocessor instruction set all of the instruction mnemonics used in Atari assembly language programming. It does not include pseudo operations (also known as pseudo ops, or directives), which vary from assembler to assembler. Here are the meanings of the abbreviations used in this appendix:

Processor Status (P) Register Flags

N  Negative (sign) flag.
V  Overflow flag.
B  Break flag.
D  Decimal flag.
I  Interrupt flag
Z  Zero Flag
C  Carry Flag

The 6502 Memory Registers

A  Accumulator.
X  X register.
Y  Y register.
M  Memory.

Addressing Modes

A     Absolute addressing.
AC    Accumulator addressing.
Z     Zero page addressing.
IMM   Immediate addressing.
IND  - Indirect addressing. 
IMP  - Implied addressing. 
AX   - Absolute,X (X-indexed) addressing. 
AY   - Absolute,Y (Y-indexed) addressing. 
IX   - Indexed indirect (Indirect,X) addressing. 
IY   - Indirect indexed (Indirect,Y) addressing. 
R    - Relative addressing. 
ZX   - Zero page X-indexed (Zero page,X) addressing. 
ZY   - Zero page Y-indexed (Zero page,Y) addressing.

The 6502 Instruction set
(6502 Mnemonics)

ADC (Add with carry): Adds the contents of the accumulator to the contents of a specified memory location or literal value. If the P register's carry flag is set, a carry is also added. The result of the addition operation is then stored in the accumulator.

AND (Logical AND): Performs a binary logical AND operation on the contents of the accumulator and the contents of a specified memory location or an immediate value. The result of the operation is stored in the accumulator.

ASL (Arithmetic Shift Left): Moves each bit in the accumulator or a specified memory location one position to the left. A zero is deposited into the the Bit 0 position, and Bit 7 is forced into the carry bit of the P register. The result of the operation is left in the accumulator or the affected memory register.

BCC (Branch if carry clear): Executes a branch if the carry flag is clear, results in no operation if the carry flag is set. Destination of branch must be within a range of -128 to +127 memory addresses from the BCC instruction.

BCS (Branch if carry set): Executes a branch if the carry flag is set, results in no operation if the carry flag is clear. Destination of branch must be within a range of -128 to +127 memory addresses from the BCS instruction.

BEQ (Branch if equal): Executes a branch if the zero flag is set, results in no operation if the zero flag is clear. Can be used to jump to cause a branch if the result of a calculation is zero, or if two numbers are equal. Destination of branch must be within a range of -128 to +127 memory addresses from the BEQ instruction.

BIT (Compare bits in accumulator with bits in a specified memory register): Performs a binary logical AND operation on the contents of the accumulator and the contents of a specified memory location. The content of the accumulator is not affected, but three flags in the P register are. The result of the AND operation is stored in the Z flag. If there is a 1 in both the accumulator and the value in memory at the same bit position, the result is non-zero and the Z flag is cleared. If the bits are different or both zero, the result is zero and the Z flag is set. In addition, bits 6 and 7 of the value in memory being tested are transferred directly into the V and N bits of the status register. This feature of the BIT instruction is often used in signed binary arithmetic. If a BIT operation results in the setting of the N flag, then the value being tested is negative. If the operation results in the setting of the V flag, that indicates a carry in signed-number math.

BMI (Branch on minus): Executes a branch if the N flag is set, results in no operation if the N flag is clear. Destination of branch must be within a range of -128 to +127 memory addresses from the BMI instruction.

BNE (Branch if not equal): Executes a branch if the zero flag is clear (that is, if the result of an operation is non-zero). Results in no operation if the zero flag is set. Can be used to jump to cause a branch if the result of a calculation is not zero, or if two numbers are not equal. Destination of branch must be within a range of -128 to +127 memory addresses from the BNE instruction.

BPL (Branch on plus): Executes a branch if the N flag is clear (that is, if the result of a calculation is positive). Results in no operation if the N flag is set. Destination of branch must be within a range of -128 to +127 memory addresses from the BPL instruction.

BRK (Break): Halts the execution of a program, much like an interrupt would, and stores the value of the program counter, plus two, on the hardware stack, along with the contents of the P register (which now has the B flag set). BRK is often used in debugging, and affects various debuggers in various ways. For more details, see your assembler and debugger's instruction manual.

BVC (Branch if overflow clear): Executes a branch if the P register's overflow (V) flag is clear. Results in no operation if the overflow flag is set. This instruction is used primarily in operations involving signed numbers. Destination of the branch must be within a range of -128 to +127 memory addresses from the BVC instruction.

BVS (Branch if overflow set): Executes a branch if the P register's overflow (V) flag is set. Results in no operation if the overflow flag is clear. This instruction is used primarily in operations involving signed numbers. Destination of the branch must be within a range of -128 to +127 memory addresses from the BVS instruction.

CLC (Clear carry): Clears the carry bit of the processor status register.

CLD (Clear decimal mode): Puts the computer into binary (its default) mode so that binary operations (the kind most often used) can be carried out properly.

CLI (Clear interrupt mask): Enables interrupts. Used in advanced assembly language programming. For more details, see advanced 6502 assembly language texts and manuals.

CLV (clear overflow flag): Clears the P register's overflow flag by setting it to zero. This instruction is used primarily in operations involving signed numbers.

CMP (Compare with accumulator): Compares a specified literal number, or the contents of a specified memory location, with the contents of the accumulator. The N, Z and C flags of the status register are affected by this operation, and a branch instruction usually follows. The result of the operation thus depends upon what branch instruction is used, and whether the value in the accumulator is less than, equal to, or more than the value being tested.

CPX (Compare with X register): Compares a specified literal number, or the contents of a specified memory location, with the contents of the X register. The N, Z and C flags of the status register are affected by this operation, and a branch instruction usually follows. The result of the operation thus depends upon what branch instruction is used, and whether the value in the X register is less than, equal to, or more than the value being tested.

CPY (Compare with Y register): Compares a specified literal number, or the contents of a specified memory location, with the contents of the Y register. The N, Z and C flags of the status register are affected by this operation, and a branch instruction usually follows. The result of the operation thus depends upon what branch instruction is used, and whether the value in the Y register is less than, equal to, or more than the value being tested.

DEC (Decrement a memory location): Decrements the contents of a specified memory location by one. If the value in the location is $00, the result of a DEC operation will be $FF, since there is no carry.

DEX (Decrement X register): Decrements the X register by one. If the value in the location is $00, the result of the DEX operation will be $FF, since there is no carry.

DEY (Decrement V register): Decrements the Y register by one. If the value in the location is $00, the result of the DEY operation will be $FF, since there is no carry.

EOR (Exclusive-OR with accumulator): Performs an Exclusive-OR operation on the contents of the accumulator and a specified literal value or memory location. The N and Z flags are conditioned in accordance with the result of the operation, and the result is stored in the accumulator.

INC (Increment memory): The contents of a specified memory location are incremented by one. If the value in the location is $FF, the result of the INC operation will be $00, since there is no carry.

INX (Increment X register): The contents of the X register are incremented by one. If the value of the X register is $FF, the result of the INX operation will be $00, since there is no carry.

INY (Increment Y register): The contents of the Y register are incremented by one. If the value of the Y register is $FF, the result of the INY operation will be $00, since there is no carry.

JMP (Jump to address): Causes program execution to jump to the address specified. The JMP instruction can be used with absolute addressing, and it is the only 6502 instruction that can be used with indirect addressing. A statement that uses indirect addressing is written using the format

If this statement were used in a program, the JMP instruction would cause program execution to jump to the value stored in memory address $0600, not to that address.

JSR (Jump to subroutine): Causes program execution to jump to the address that follows the instruction. That address should be the starting address of a subroutine that ends with the instruction RTS. When the program reaches that RTS instruction, execution of the program returns to the next instruction after the JSR instruction that caused the jump to the subroutine.

LDA (Load the accumulator): Loads the accumulator with either a specified value or the contents of a specified memory location. The N flag is conditioned if a value with the high bit set is loaded into the accumulator, and the Z flag is set if the value loaded into the accumulator is zero.

LDX (Load the X register): Loads the X register with either a specified value or the contents of a specified memory location. The N flag is conditioned if a value with the high bit set is loaded into the X register, and the Z flag is set if the value loaded into the X register is zero.

LDY (Load the V register): Loads the Y register with either a specified value or the contents of a specified memory location. The N flag is conditioned if a value with the high bit set is loaded into the Y register, and the Z flag is set if the value loaded into the Y register is zero.

LSR (Logical shift right): Each bit in the accumulator is moved one position to the right. A zero is deposited into the bit 7 position, and bit 0 is deposited into the carry. The result is left in the accumulator or in the affected memory register.

NOP (No operation): Causes the computer to do nothing for two cycles. Used in delay loops and to synchronize the timing of computer operations.

ORA (Inclusive-OR with the accumulator): Performs a binary inclusive-OR operation on the value in the accumulator and a literal value or the contents of a specified memory location. The N and Z flags are conditioned in accordance with the result of the operation, and the result of the operation is deposited in the accumulator.

PHA (Push accumulator): The contents of the accumulator are pushed on the stack. The accumulator and the P register are not affected.

PHP (Push processor status): The contents of the P register are pushed on the stack. The P register itself is left unchanged, and no other registers are affected.

PLA (Pull accumulator): One byte is removed from the stack and deposited in the accumulator. The N and Z flags are conditioned, just as if an LDA operation had been carried out.

PLP (Pull processor status): One byte is removed from the stack and deposited in the P register. This instruction is used to retrieve the status of the P register after it has been saved by pushing it onto the stack. All of the flags are thus conditioned to reflect the original status of the P register.

ROL (Rotate left): Each bit in the accumulator or a specified memory location is moved one position to the left. The carry bit is deposited into the bit 0 location, and is replaced by bit 7 of the accumulator or the affected memory register. The N and Z flags are conditioned in accordance with the result of the rotation operation.

ROR (Rotate right): Each bit in the accumulator or a specified memory location is moved one position to the right. The carry bit is deposited into the bit 7 location, and is replaced by bit 0 of the accumulator or the affected memory register. The N and Z flags are conditioned in accordance with the result of the rotation operation.

RTI (Return from interrupt): The status of both the program counter and the P register are restored in preparation for resuming the routine that was in progress when an interrupt occurred. All flags of the P register are restored to their original values. Interrupts are used in advanced assembly language programs, and detailed information on interrupts is available in advanced assembly language texts and Atari reference manuals.

RTS (Return from subroutine): At the end of a subroutine, returns execution of a program to the next address after the JSR (jump to subroutine) instruction that caused the program to jump to the subroutine.

SBC (Subtract with carry): Subtracts a literal value or the contents of a specified memory location from the contents of the accumulator. The opposite of the carry is also subtracted -- in other words, there is a borrow. The N, V, Z and C flags are all conditioned by this operation, and the result of the operation is deposited in the accumulator.

SEC (Set carry): The carry flag is set. This instruction usually precedes an SBC instruction. Its primary purpose is to set the carry flag so that there can be a borrow.

SED (Set decimal mode): Prepares the computer for operations using BCD (binary coded decimal) numbers. BCD arithmetic is more accurate than binary arithmetic -- the usual type of 6502 arithmetic -- but is slower and more difficult to use, and consumes more memory. BCD arithmetic is usually used in accounting and bookkeeping programs, and in floating point arithmetic.

SEI (Set interrupt disable): Disables the interrupt response to an IRQ (maskable interrupt). Does not disable the response to an NMI (non-maskable interrupt). Interrupts are used in advanced assembly language programming, and are described in advanced assembly language texts and Atari reference manuals.

STA (Store accumulator): Stores the contents of the accumulator in a specified memory location. The contents of the accumulator are not affected.

STX (Store x register): Stores the contents of the X register in a specified memory location. The contents of the X register are not affected.

STY (Store Y register): Stores the contents of the Y register in a specified memory location. The contents of the Y register are not affected.

TAX (Transfer accumulator to X register): The value in the accumulator is deposited in the X register. The N and Z flags are conditioned in accordance with the result of this operation. The contents of the accumulator are not changed.

TAY (Transfer accumulator to Y register): The value in the accumulator is deposited in the Y register. The N and Z flags are conditioned in accordance with the result of this operation. The contents of the accumulator are not changed.

TSX (Transfer stack to X register): The value of the stack pointer is deposited in the X register. The N and Z flags are conditioned in accordance with the result of this operation. The value of the stack pointer is not changed.

TXA (Transfer X register to accumulator): The value in the X register is deposited in the accumulator. The N and Z flags are conditioned in accordance with the result of this operation. The value of the X register is not changed.

TXS (Transfer X register to stack): The value in the X register is deposited to the stack pointer. No flags are conditioned by this operation. The value of the X register is not changed.

TYA (Transfer Y register to accumulator): The value in the Y register is deposited in the accumulator. The N and Z flags are conditioned by this operation. The value of the Y register is not changed.


Return to Table of Contents | Previous Chapter | Next Chapter