APPENDIX FOURTEEN
The XL/XE Parallel Bus
The most exciting new feature on the XL computers is probably the least heralded and the most unused: the parallel expansion bus port (PBI) on the back of the machines. It provides direct, unbuffered ac- cess to all of the address, data, and control lines, allowing the use of high-speed peripherals (fast parallel I/O disk drives, hard disks, and custom I/O devices). The April 1985 issue of Analog magazine has an article by Michael Barton on adding additional memory to his 600XL via the expansion port. Antic ran a special four-part series by Earl Rice on the bus from January to April 1985. The bus connector looks like this: Top Pin Pin Bottom Ground GND 1 2 External select Address output A0 3 4 A1 A2 5 6 A3 A4 7 8 A5 A6 9 10 GND A7 11 12 A8 A9 13 14 A10 A11 15 16 A12 A13 17 18 A14 GND 19 20 A15 Data lines D0 21 22 D1 (Bidirectional) D2 23 24 D3 D4 25 26 D5 D6 27 28 D7 GND 29 30 GND Phase 2 clock output 31 32 GND Reserved NC 33 34 Reset output Interrupt request (IRQ) 35 36 Ready input NC 37 38 External decoder output NC 39 40 Refresh output Column address output 41 42 GND Math pack disable input 43 44 Row addr strobe GND 45 46 Latch read/write out (+5v dc?) NC 47 48 NC (+5v dc?) Audio input 49 50 GND Looking at the bus from the back, it looks like this: TOP 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 +---------------------------------------------------------------------------+ | . . . . . . . . . . . . . . . . . . . . . . . . . | | | | | | . . . . . . . . . . . . . . . . . . . . . . . . . | +---------------------------------------------------------------------------+ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 BOTTOM The expansion bus is a complex subject--enough for a whole book. Refer to Rice's articles which cover the bus in greater detail. The XE continues the parallel bus, but improves it with a clock line and built- in +/-5v dc current, (Barton, in his article in Analog, says pins 47 and 48 are already 5v dc on the XL bus.)Changes on the 130XE
On the 130 XE, the parallel bus is called the enhanced cartridge interface--ECI--basically, a 14-pin extension to the cartridge slot which allows external devices to connect to the machine's address and data bus lines and to access the operating system software and detect the internal state of the computer, It is functionally similar to and software-compatible with the PBI described above, The pin uses for the cartridge and the extension are as follows: Present 30-pin cartridge connector Top side Pin Place Description RD4 A ROM present GND B Ground A4-A9 C-J Address lines A12 K Address line D3 L Data line D7 M Data line A11 N Address line A10 P Address line R/W R Processor read/write line PH12 S System clock line Bottom side Pin Place Description S4 1 Chip select line--$8000 to $9FFF (right slot address on the 800) A3 2 Address line A2 3 Address line A1 4 Address line A0 5 Address line D4 6 Data line D5 7 Data line D2 8 Data line D1 9 Data line D0 10 Data line D6 11 Data line S5 12 Chip select line--$A000 to $BFFF (left slot address on the 800) +5v 13 DC power supply RD5 14 ROM present CCTL 15 ROM bank control selection line Looking at the cartridge slot from the back, the pins are as follows: A B C D E F H J K L M N P R S +-------------------------------------------------------------+ | . . . . . . . . . . . . . . . | | | | | | . . . . . . . . . . . . . . . | +-------------------------------------------------------------+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1. S4 A. RD4 2. A3 B. GND 3. A2 C. A4 4. A1 D. A5 5. A0 E. A6 6. D4 F. A7 7. D5 H. A9 8. D2 J. A9 9. D1 K. A12 10. D0 L. D3 11. D6 M. D7 12. S5 N. A11 13. +5v P. A10 14. RD5 R. R/W 15. CCTL S. B02 14-pin extension Top side Pin Place Description Res A Reserved IRQ B Interrupt request line HALT C ANTIC halt signal A13-15 D-F Upper three address lines GND H Ground Bottom side Pin Place Description EXSEL 1 External device select? RST 2 System RESET D1xx 3 Chip select at area $Dlxx MPD 4 Math pack (FP) disable AUDIO 5 External audio input REF 6 Present cycle is a refresh cycle line +5v 7 Second dc power supply Looking at the extension from the back, we see: A B C D E F H +-----------------------------+ | . . . . . . . | | | | | | . . . . . . . | +-----------------------------+ 1 2 3 4 5 6 7 A. Reserved 1. EXSEL B. IRQ 2. RST C. HALT 3. D1XX D. A13 4. MPD E. A14 5. Audio F. A15 6. REF H. GND 7. +5vAtari 65XE
There is no parallel bus on the 65XE; it was dropped by Atari since third-party manufacturers had not taken advantage of it.
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